سال انتشار: ۱۳۸۶
محل انتشار: چهارمین کنفرانس انجمن رمز ایران
تعداد صفحات: ۶
Hadi Shahriar Shahhoseini – Electrical Engineering Department, Iran University of Science and Technology, Tehran, Iran
Abdulah Abdulahzadeh – Electrical Engineering Department, Iran University of Science and Technology, Tehran, Iran
Bahamin Sabouti – Electrical Engineering Department, Iran University of Science and Technology, Tehran, Iran
In this paper, a new parallel cryptography processor core for elliptic curve cryptosystems has been designed. This architecture has been implemented over GF(2163). It is a high performance processor that has employed a high speed divider which is two times faster than conventional divider. The main approach of this paper is employment parallelism in the core and increasing the internal unit utilization to do two separate kP multiplications simultaneously by a common divider and multiplier unit; so it is called Dual Scalar Multiplier or DSM. Since the divisions and the multiplications are the most time consuming operations in the elliptic curve cryptography, the time is scheduled to reach the maximum performance in multiplication and division during two scalar multiplications. Also division and multiplication units are the most complicated units which their implementations occupy chip area more than other arithmetic units. The core has been implemented and the implementation results are reported. It can be seen that under equivalent conditions, DSM reduces the processing time to half while the chiprea is less than twice of before.