سال انتشار: ۱۳۸۳
محل انتشار: دوازدهیمن کنفرانس مهندسی برق ایران
تعداد صفحات: ۵
A. Nabavi – Electrical Eng. Department Tarbiat Modarres University
M. A. Mansouri Birjandi – IC-Design Lab Tarbiat Modarres University
M Jalali – IC-Design Lab Tarbiat Modarres University
This paper describes a novel circuit design technique for low-voltage rail-to-rail inputstages based on CMOS composite cells. This inputstage is suitable to be incorporated on the design of any amplifier topology with extended common mode input range. To achieve rail-to-rail input voltagerange, two pairs of this cell are connected in parallel. The transconductance of each pairs are inherently tunable by a biasing voltage. The constant- gm characteristic is controlled by applying suitable values to these biasing voltages maintaining the smooth response over the change of input common mode voltage. HSPISE simulations show
that the overall transconductance has linearity better than 6 percent with 2.5V supply voltage.