سال انتشار: ۱۳۸۵
محل انتشار: دوازدهمین کنفرانس سالانه انجمن کامپیوتر ایران
تعداد صفحات: ۸
Somayeh Timarchi – Department of Computer Engineering, Faculty of Electrical & Computer Engineering, Shahid Beheshti University, Tehran, Iran
Keivan Navi – Department of Computer Engineering, Faculty of Electrical & Computer Engineering, Shahid Beheshti University, Tehran, Iran
Modulo 2n +1 adders are important for several applications including residue number system implementations, digital signal processors and cryptography algorithms. In this paper we present a new number system and a novel addition algorithm for its operands. In this paper, we present two new architectures for designing modulo 2n +1 adder, based on ripple carry adder. The first architecture utilizes a more rapid architecture whereas the second applies less hardware. In the proposed method, the special treatment required for zero operands in diminished-one number system is removed. In the fastest modulo 2n +1 adders in normal binary system, we are faced with 3-operand adders. This problem is also resolved in this paper.