سال انتشار: ۱۳۸۵

محل انتشار: چهاردهمین کنفرانس مهندسی برق ایران

تعداد صفحات: ۴

نویسنده(ها):

A. Sheikholeslami – Institute for Microelectronics, TU Vienna, A-1040 Vienna, Austria
R. Heinzl – Christian Doppler Laboratory for TCAD at the Institute for Microelectronics
S. Holzer – Christian Doppler Laboratory for TCAD at the Institute for Microelectronics
C. Heitzinger – School of Electrical and Computer Engineering, Purdue University, USA

چکیده:

We present applications of the two- and three-dimensional general purpose topography simulator ELSA (Enhanced Level Set Applications) for semiconductor manufacturing processes. The first process considered is the deposition of silicon dioxide from TEOS for power MOSFETs. For backend processes in addition to a TEOS process, the deposition of silicon nitride into interconnect lines, where two and threedimensional void characteristics play an important role for determining timing delays and cracking effects, is necessary and thus is simulated.