سال انتشار: ۱۳۸۴
محل انتشار: سیزدهیمن کنفرانس مهندسی برق ایران
تعداد صفحات: ۵
Ali Peiravi – Department of Electrical Engineering, Ferdowsi University of Mashhad,. Iran
Farshad Moradi – Department of Electrical Engineering, Ferdowsi University of Mashhad,. Iran
Negin Hashemi – Insitute of Digital Circuit Design, Tehran, Iran
In this paper, a new circuit idea for improving noise immunity domino logics, especially for wide ones, is presented. Dynamic gates are widely used for high performance processors and also used in full adders that are most important part of a CPU. The leakage currents ismost important issue in UDSM technologies, so this issue motivates us to present a new idea for decreasing sub threshold leakage current in domino logic circuits, especially for submicron technologies. Our proposed circuit enhances noise immunity at least. 1.93X to 8.4X compared with other conventional domino circuits. We simulated our proposed circuit using predictive models for 70nm CMOS technology.