سال انتشار: ۱۳۸۷

محل انتشار: دومین کنگره بین المللی علوم و فناوری نانو

تعداد صفحات: ۲

نویسنده(ها):

F Kohani – Device and Process Modeling and Simulation Lab., School of Electrical and Computer Eng., University of Tehran
M Fathipour –
F Razaghian – Dept. of Electrical Engineering, Islamic AZAD University, Tehran South Branch, Tehran, Iran

چکیده:

The Schottky Barrier S/D MOSFET (SBMOSFET) offers several attractive advantages over the conventional MOSFET such as superior scaling property, ease of fabrication, low parasitic resistance [1]. Moreover, the thermal budget needed to fabricate SBMOSFETs may be significantly reduced due to elimination of doping process in fabrication of SB MOSFETs. However, this type of MOSFET can not achieve the high drive current because the current is limited by Schottky Barrier Height (SBH) at the source. To improve the current drivability of SBMOS, Ikeda et al. [2] proposed a strained SiGe channel because carriers SBH are reduced by using SiGe. Strained SiGe channel pMOSFET has also received a great deal of attention recently due to its improved mobility [3]. In addition to strained SiGe buried channel, in Hetero Schottky Barrier PMOS, a parasitic channel will also be formed at the Si/SiO2 interface for high negative voltages. The thickness of Si Cap layer (TSiCap) is an important parameter in this device. In this paper, we demonstrate that in our proposed device, by decreasing Si Cap thickness, the Ion/Ioff ratio and transconductance can be improved up to 98% and 20%, respectively