سال انتشار: ۱۳۸۶

محل انتشار: پانزدهیمن کنفرانس مهندسی برق ایران

تعداد صفحات: ۶

نویسنده(ها):

Hadi Shahriar shahhoseini – Department of Electrical and Computer Engineering, Shahid Beheshti university
Abdulah Abdulah zadeh – Department of Electrical Engineering, Iran University of Science and technoloty

چکیده:

In this paper a new parallel architectare isproposed for ECC processors. In the proposedprocessor, n GF multiplier has been employed and
scalar multiplication is divided to n parts. Thearchitecture is scalable; so it is called Scalable Partial Multiplier, SPM. SPM employs the Extended~onchrrenAt lgorithm which is introduced in this paper on base of previous 2-part concurrent algorithm. SPM architecture used over GF(P). The implementation of SPM and its timing is discussed. The eflciemy of architecture evaluated according to AT2, and TM, and it is shown AT2 is improved 19% for n=4.