سال انتشار: ۱۳۸۵
محل انتشار: چهاردهمین کنفرانس مهندسی برق ایران
تعداد صفحات: ۶
M. Salmani Jelodar – School of Electrical and Computer Engineering University of Tehran
M. Kamal – Compuetr Engineering Department Sharif University
S. M. Fakhraie – School of Electrical and Computer Engineering University of Tehran
M. Nili Ahmadabadi – School of Electrical and Computer Engineering University of Tehran
The ever-growing complexity of the modern chips is forcing fundamental changes in the way systems are designed. System-on-a-Programmable-Chip (SOPC) concept is bringing a major revolution in the design of integrated circuits, due to the fact that it makes unprecedented levels of in-field integration possible. Genetic algorithm (GA) is a powerful function optimizer that is used successfully to solve problems in many different disciplines. A major drawback of GA is that it needs huge computation time for sequential execution on PCs. Therefore, the hardware implementation of GA has been the focus of some recent studies. In this paper, a SOPC-based genetic algorithm framework is proposed. Our proposed framework can be used in real-time applications. We have implemented our proposed system on an Altera® Stratix Development Kit and we compare its performance with the corresponding software simulation. The results obtained indicate a speedup of up to 31 times in the elapsed computation time on this system.